用网络分析仪测试时，测试端口是标准50Ω同轴线缆，因此在连接被测电缆时要求使用转接头或夹具，而这些接头和夹具的S参数未知，需要去除其影响，才能获得被测线缆的实际参数。目前常用的方法是去嵌入或夹具移除法，这些方法要求设计的夹具和微带校准件，校准后移除夹具的S参数。其难点在于夹具及其校准件的制作，通常校准件的参数是理论设计值，跟实际值有一定差距，并且校准和得到的夹具自身S参数，可能造成实测数据曲线的波动，甚至错误。
PV023R1K1T1NHCC
PV023R1K1T1VMMC
PV023R1K1T1WMRC
PV023R9K1T1NFWS
PV023R1K1JHNMMC
PV023R1K4T1NFHS
PV023R1L1T1NMMC
PV023R1K8T1VMMC
PV023R1K1T1NFRZ
PV023R9K1T1NMMC
PV023R1K4T1NMR1
PV023R1K1T1VFDS
PV023R1K8T1NMMC
PV023R1K8T1NFWS
PV023R1K1T1WMR1
PV023R1K8T1N001
PV023L1K1T1NMMC
PV023R1K4T1NMMC
PV023R1K1T1NKLC
PV023R1K4T1NFR1
PV023R1K1S1NFWS
PV023R1K1T1NFFC
PV023L1K1T1NFWS
PV023R1K1T1WFDS
PV023R1K1T1NFFP
PV023R1L1T1NF
PV023R1K1T1WMM1
PV023R1K1T1NHLC
PV023R1K1T1NMRZ
PV023R1K1T1NMRK
PV023R1K1T1WMMC
PV023R1K1T1NFF1
PV028R1K1T1N001
PV028R1K1T1N100
PV028R1K1T1NFDS
PV028R1K1T1NFR1
PV028R1K1T1NFHS
PV028R1K1T1NMMC
PV028R1K1T1NMM1
PV028R1K1T1NMRC
PV028R1K1T1NFWS
PV028R1K1T1NFRC
PV028R1K1T1NFF1
PV028R1K1T1WMM1
PV028R1K1T1WFR1
PV028R1K8T1NFWS
PV028R1K4T1NFR1
PV028R1K1T1VMMC
PV028R1K1T1NHCC
PV028R1K4T1NMMC
PV028R1K1T1NELC
PV028R1K1T1NHLC
PV028R1K8T1N001
PV028R1K1T1NF
PV028R9K1T1NFWS
PV028R9K1T1NMMC
PV028R1K1T1VFDS
PV028R1K1AYNMRZ
PV028R1K8T1NMMC
PV028R1K1T1NMRK
PV028R1K1T1NFFP
PV028L1K1T1NMMC
PV028R1K1T1NFRZ
PV028R1K1S1NFWS
PV028R1K1T1NMMZ
PV028R1K1T1NMR1
PV028R1K1T1NMFC
PV028R1K1T1WFDS
PV028L1K1T1NFWS
PV028R1K1JHNMMC
PV028R1K1T1NMRZ
PV028R1K4T1NFHS
PV028R1K1T1NMF1
PV028R1K1T1NGLC
PV028R1K1T1WMRC
PV028R1L1T1NMMC
PV028R1K1T1WMMC
PV028R1K1T1WMR1
PV028R1K8T1VMMC
PV028R1K1T1NFFC
PV028R1K1T1NMMK
PV028R1K4T1NMR1
PV032R1K1T1N001
PV032R1K1T1N100
PV032R1K1T1NFDS
PV032R1K1T1NFR1
PV032R1K1T1NFHS
PV032R1K1T1NMMC
PV032R1K1T1NMM1
PV032R1K1T1NMRC
PV032R1K1T1NFWS
PV032R1K1T1NFRC
PV032R1K1T1NFF1
PV032R1K1AYNMTZ
PV032R1K1T1NMFC
PV032R1K1T1NMR1
PV032R1K1T1NMF1
PV032R1K1T1NMRK
PV032R1K1T1NFFP
PV032R1K1T1WMMC
PV032R1K4T1NMMC
PV032R1K8T1VMMC
PV032R1K1T1WFR1
PV032R1K1T1NFFC
PV032R1K1JHNMMC
PV032R1K1T1WMRC
PV032R9K1T1NFWS
时间交错技术可使用多个相同的ADC（文中虽然仅讨论了ADC，但所有原理同样适用于DAC的时间交错特性），并以比每一个单独数据转换器工作采样速率更高的速率来处理常规采样数据序列。简单说来，时间交错（IL）由时间多路复用M个相同的ADC并联阵列组成。如图1所示。这样可以得到更高的净采样速率fs（采样周期Ts=1/fs），哪怕阵列中的每一个ADC实际上以较低的速率进行采样（和转换），即fs/M。举例而言，通过交错四个10位/100MSPSADC，理论上可以实现10位/400MSPSADC。
