Ethernet MAC with associated DMA controller. These functions reside on an
independent AHB bus.
USB 2.0 Full-Speed Device with on-chip PHY and associated DMA controller.
Four UARTs with fractional baud rate generation, one with modem control I/O, one
with IrDA support, all with FIFO.
CAN controller with two channels.
SPI controller.
Two SSP controllers, with FIFO and multi-protocol capabilities. One is an alternate
for the SPI port, sharing its interrupt and pins. These can be used with the GPDMA
controller.
Three I2C-bus interfaces (one with open-drain and two with standard port pins).
I2S (Inter-IC Sound) interface for digital audio input or output. It can be used with
the GPDMA.
Other Peripherals:
Secure Digital (SD) / MultiMediaCard (MMC) memory card interface (LPC2368
only).
70 General purpose I/O pins with configurable pull-up/down resistors.
10-bit ADC with input multiplexing among 6 pins.
10-bit DAC.
Four general purpose Timers/Counters with total of 8 capture inputs and 10
compare outputs. Each Timer block has an external count input.
One PWM / Timer block with support for three-phase motor control. The PWM has
two external count inputs.
Real Time Clock with separate power pin, clock source can be the RTC oscillator or
the APB clock.
2 kB SRAM powered from the RTC power pin, allowing data to be stored when the
rest of the chip is powered off.
Watchdog Timer. The watchdog timer can be clocked from the internal RC
oscillator, the RTC oscillator, or the APB clock
